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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20211028T171108Z
LOCATION:231-232
DTSTART;TZID=America/Chicago:20211115T090000
DTEND;TZID=America/Chicago:20211115T173000
UID:submissions.supercomputing.org_SC21_sess142_wksp145@linklings.com
SUMMARY:Seventh International Workshop on Heterogeneous High-Performance R
 econfigurable Computing
DESCRIPTION:Workshop\n\nSeventh International Workshop on Heterogeneous Hi
 gh-Performance Reconfigurable Computing\n\nO'Brien, Bakos, Plessl, Hoefler
 , Cappello\n\nAs conventional vonNeumann architectures are suffering from 
 rising power densities, we are facing an era with power, energy efficiency
  and cooling as first-class constraints for scalable HPC. FPGAs can tailor
  the hardware to the application, avoiding overheads and achieving higher 
 hardware efficiency than general-purpose architectures. Leading FPGA manuf
 acturers have recently made a concerted effort to provide a range of highe
 r-level, easier-to-use high-level programming models for FPGAs, and much o
 f the work in FPGA-based deep learning is built on these frameworks.\n\nSu
 ch initiatives are already stimulating new interest within the HPC communi
 ty around the potential advantages of FPGAs over other architectures. With
  this in mind, this workshop, now in its fifth year, brings together HPC a
 nd heterogeneous-computing researchers to demonstrate and share experience
 s on how newly-available high-level programming models are already empower
 ing HPC software developers to directly leverage FPGAs, and to identify fu
 ture opportunities and needs for research in this area.\n\nRegistration Ca
 tegory: Workshop Reg Pass
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