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BEGIN:VEVENT
DTSTAMP:20211207T055350Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211117T083000
DTEND;TZID=America/Chicago:20211117T170000
UID:submissions.supercomputing.org_SC21_sess242_spostu121@linklings.com
SUMMARY:Analyzing Software Cache Configuration for In-line Data Compressio
 n
DESCRIPTION:ACM Student Research Competition: Graduate Poster, ACM Student
  Research Competition: Undergraduate Poster, Posters\n\nAnalyzing Software
  Cache Configuration for In-line Data Compression\n\nRanjan\n\nIn order to
  compute on or analyze larger data sets, application need access to large 
 amounts of DRAM memory. To increase the size of memory requires a costly h
 ardware upgrade. Compressing data structures stored in memory does not req
 uire hardware upgrades. Inline compression compresses and decompress data 
 needed by the application as it moves out and into it's working set. Naïve
  inline compression compresses and decompresses for each memory access whi
 ch significantly hurts performance. Caching decompressed values in a softw
 are managed cache limits the number of compression/decompression operation
 s. The structure of the cache impacts the performance of the application. 
 In this poster, we build and utilize a compression cache simulator to anal
 yze various cache configurations for an application. We evaluate direct-ma
 pped and set-associative caches on five HPC kernels. Results show that as 
 the cache size increases, the hit rate increases. An increase in cache ass
 ociativity also improves the hit rate.\n\nTag: In-Person Only\n\nRegistrat
 ion Category: Tech Program Reg Pass, Exhibit Hall Only
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