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BEGIN:VEVENT
DTSTAMP:20211207T055402Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211116T083000
DTEND;TZID=America/Chicago:20211116T170000
UID:submissions.supercomputing.org_SC21_sess256_drs106@linklings.com
SUMMARY:Toward Complete Emulation of Quantum Algorithms Using High-Perform
 ance Reconfigurable Computing
DESCRIPTION:Doctoral Showcase, Posters\n\nToward Complete Emulation of Qua
 ntum Algorithms Using High-Performance Reconfigurable Computing\n\nMahmud,
  El-Araby\n\nQuantum computing, at its current nascent stage, has many cri
 tical problems that require investigation. For instance, solving real-worl
 d problems require quantum circuits with large depth which are difficult, 
 often impossible to implement on a quantum computer due to decoherence noi
 se. More specifically, developing I/O-intensive quantum applications requi
 re large amount of classical data to be transferred to the quantum domain.
  Performing classical-to-quantum (C2Q) data-encoding requires deep, comple
 x circuits. Current quantum devices have low qubit counts and often produc
 e faulty or noisy measurements, which results in heavy dependency on costl
 y, resource-hungry simulators. This work proposes a cost-effective, hardwa
 re-based emulation methodology for quantum computation, using Field Progra
 mmable Gate Arrays (FPGA) technology. The proposed methodology enables emu
 lation of quantum computation with high-scalability, high-accuracy, and hi
 gh-throughput, compared to existing FPGA-based emulators. The emulation fr
 amework includes C2Q data-encoding circuit models that are highly optimize
 d, compared to existing methods. The proposed emulation methodology allows
  investigating optimizations for several important quantum algorithms such
  as Quantum Fourier Transform (QFT), Quantum Grover’s Search (QGS), 
 and Quantum Haar Transform (QHT). In addition, it facilitated developing n
 ovel extensions to conventional QGS to enable search for dynamically chang
 ing data, as well as developing decoherence-optimized circuits for QHT. Fu
 rthermore, a novel technique is presented combining QHT and dynamic, multi
 -pattern QGS to perform dimension reduction for pattern matching and recog
 nition on high-resolution, spatio-spectral data. Emulation architectures a
 re designed and implemented on a high-performance reconfigurable computer 
 (HPRC). As a case study, quantum image processing using multi-spectral ima
 ges is investigated in experiments.\n\nTag: In-Person Only\n\nRegistration
  Category: Tech Program Reg Pass, Exhibit Hall Only
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