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BEGIN:VEVENT
DTSTAMP:20211207T055403Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211116T083000
DTEND;TZID=America/Chicago:20211116T170000
UID:submissions.supercomputing.org_SC21_sess278_rpost124@linklings.com
SUMMARY:Flexible GMRES with Analog Accelerators
DESCRIPTION:Posters, Research Posters\n\nFlexible GMRES with Analog Accele
 rators\n\nGupta, Kalantzis, Squillante, Wu, Avron...\n\nThis research post
 er describes advances in the solution of general sparse linear systems by 
 applying the preconditioning step primarily through the help of an analog 
 crossbar array. These architectures can achieve high degrees of parallelis
 m with low energy consumption by mapping matrices onto arrays of non-volat
 ile memristive elements capable of storing information and executing basic
  arithmetic operations. Performing matrix-vector multiplication and outer-
 product updates is then possible in a time that is independent of the numb
 er of nonzero entries in the operand matrices. On the other hand, the anal
 og crossbar arrays introduce large amounts of noise, and flexible algorith
 ms are required. In this research nearly an order of magnitude speedup ove
 r GMRES preconditioned with ILU(0) is advanced, both with respect to simil
 ar solvers on a conventional microprocessor for attaining the same level o
 f accuracy.\n\nRegistration Category: Tech Program Reg Pass, Exhibit Hall 
 Only
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