BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20211207T055403Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211116T083000
DTEND;TZID=America/Chicago:20211116T170000
UID:submissions.supercomputing.org_SC21_sess278_rpost164@linklings.com
SUMMARY:SODA-OPT: System-Level Design in MLIR for HLS
DESCRIPTION:Posters, Research Posters\n\nSODA-OPT: System-Level Design in 
 MLIR for HLS\n\nBohm Agostini, Kaeli, Tumeo\n\nHigh-level-synthesis (HLS) 
 enables the generation of hardware descriptions from applications implemen
 ted with high-level languages.  State-of-the-art tools, however, typically
  require the application to be manually translated to C/C++ and carefully 
 annotated to improve final design performance. This cumbersome process pre
 vents scientists and researchers from tapping into the power of HLS, as ma
 ny of their applications are written in higher-level languages, such as py
 thon, and require significant effort to be ported. To overcome this challe
 nge, we propose SODA-OPT, a front-end compiler tool that leverages the MLI
 R framework to provide host binaries and pre-optimized accelerator code fo
 r a back-end tool of choice. SODA-OPT requires no manual code translations
  and presents a novel approach to automate the outlining, mapping and gene
 ration of custom accelerators. Thanks to our selection of MLIR optimizatio
 ns at the appropriate level of abstraction, our tool creates high-quality 
 optimized kernels for HLS that expose code structures resulting in 1.6x fa
 ster runtime.\n\nRegistration Category: Tech Program Reg Pass, Exhibit Hal
 l Only
END:VEVENT
END:VCALENDAR