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DTSTAMP:20211207T055354Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211117T083000
DTEND;TZID=America/Chicago:20211117T170000
UID:submissions.supercomputing.org_SC21_sess279_rpost131@linklings.com
SUMMARY:Hardware Acceleration of Complex Machine Learning Models through M
 odern High-Level Synthesis
DESCRIPTION:Posters, Research Posters\n\nHardware Acceleration of Complex 
 Machine Learning Models through Modern High-Level Synthesis\n\nCurzel, Tum
 eo, Ferrandi\n\nMachine learning algorithms continue to receive significan
 t attention from industry and research. As the models increase in complexi
 ty and accuracy, their computational and memory demands also grow, pushing
  for more powerful, heterogeneous architectures; custom FPGA/ASIC accelera
 tors are often the best solution to efficiently process large amounts of d
 ata close to the sensors in large-scale scientific experiments. Previous w
 orks exploited high-level synthesis to help design dedicated compute units
  for machine learning inference, proposing frameworks that translate high-
 level models into annotated C/C++. Our proposal, instead, integrates HLS i
 n a compiler-based tool flow with multiple levels of abstraction, enabling
  analysis, optimization and design space exploration along the whole proce
 ss. Such an approach will also allow to explore models beyond multi-layer 
 perceptrons and convolutional neural networks (which are often the main ta
 rget of "classic" HLS frameworks), for example to address the different ch
 allenges posed by sparse and graph-based neural networks.\n\nRegistration 
 Category: Tech Program Reg Pass, Exhibit Hall Only
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