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Narrowing the Search Space of Applications Mapping on Hierarchical Topologies
Event Type
Online Only
Accelerator-based Architectures
Computational Science
Emerging Technologies
Extreme Scale Comptuing
File Systems and I/O
Heterogeneous Systems
Parallel Programming Languages and Models
Scientific Computing
Software Engineering
Registration Categories
TimeMonday, 15 November 20215pm - 5:30pm CST
DescriptionProcessor architectures at exascale and beyond are expected to continue to suffer from issues of nonuniform access to in-die and node-wide shared resources. Mapping applications onto these resource hierarchies is an on-going performance concern, requiring specific care for increasing locality and resource sharing but also for ensuing contention. Application-agnostic approaches to search efficient mappings are based on heuristics. Indeed, the size of the search space makes it impractical to find optimal solutions nowadays and will only worsen as the complexity of computing systems increases over time. In this paper we leverage the hierarchical structure of modern compute nodes to reduce the size of this search space. As a result, we facilitate the search for optimal mappings and improve the ability to evaluate existing heuristics. Using widely known benchmarks, we show that permuting thread and process placement per node of a hierarchical topology leads to similar performances. As a result, the mapping search space can be narrowed down by several orders of magnitude when performing exhaustive search. This reduced search space will enable the design of new approaches, including exhaustive search or automatic exploration. Moreover, it provides new insights into heuristic-based approaches, including better upper bounds and smaller solution space.
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