SC21 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

Advanced Architecture Testbeds: Community Resources for Enhanced HPC Research


Authors: Jeffrey Young (Georgia Institute of Technology), Kevin Barker (Pacific Northwest National Laboratory (PNNL)), Mark Klein (Swiss National Supercomputing Centre (CSCS)), Alice Koniges (University of Hawai'i), Jim Laros (Sandia National Laboratories), Jeff Vetter (Oak Ridge National Laboratory (ORNL))

Abstract: New candidate architectures for future supercomputer systems are supported by user-focused testbeds that allow researchers to test their applications on hardware that may be hard to access at smaller scales. This BoF brings together panelists from advanced architecture testbed efforts including CSCS’s user lab, PNNL’s CENATE testbed, HAAPS at SNL, the Rogues Gallery at Georgia Tech, ExCL at ORNL and the Maui HPC Center to discuss next-generation architectures and challenges for using them. Panelists and attendees will discuss how these testbeds can evolve to meet the growing demand for access to novel architectures. with a focus on remote accessibility.

Long Description: The supercomputing community is in the midst of a period of unprecedented architectural innovation. The explosion in architectural diversity leads to a number of challenges, including understanding the potential performance impact of new architectural technologies on workloads of interest and guidance for architectural design from application and algorithm features. To address these challenges, a variety of architectural testbed efforts have been established, including CENATE at Pacific Northwest National Laboratory, HAAPS at Sandia National Laboratory, Rogues Gallery at Georgia Tech, the User lab at CSCS, HPCMP at several testbed sites, and ExCL at Oak Ridge National Laboratory. This BoF brings together researchers and practitioners involved in these explorations and other efforts to ensure their alignment, increased coverage of diverse architectures, sharing of lessons learned in advanced architectural exploration, and support for efforts to provide secure remote access to these testbeds. The audience is encouraged to be actively involved in discussion with topics ranging from applications, algorithm design, programming language, compiler, resilience, security perspectives.

Our BoF aims to cover diverse topics: architectural diversity, hardware/software co-design, and different strategies to build more effective user-facing test environments. Foremost among them is the dimension of architectural diversity in processors, memory, and network that resulted from architectural designers grappling with increased demands on performance and energy efficiency. In the processing space, computing elements such as multi-core CPUs, GPUs, FPGAs, Tensor Processing Units (TPUs), near-memory accelerators, and graph- and ML-accelerators are increasingly finding their way into HPC system installations. Similarly, memory technologies including conventional DRAM, stacked memory (e.g., HBM), and non-volatile and storage-class memory are leading to increased heterogeneity and are placing additional burdens on applications seeking to make the most effective use of limited memory resources. In the interconnection network space, electrical packet-switched networks, optical circuit-switched networks, and advanced NIC and switch designs are leading to new network topologies and performance characteristics that are having an impact on applications’ communication behavior. BoF panelists will have an opportunity to describe the testbed systems that are currently in place, and all attendees will have a chance to discuss current gaps in testbed installations and new requirements and challenges that have arisen for remote testing and evaluation as a result of the 2020 COVID-19 pandemic.

An emerging topic for this BoF will be security issues related to new architectures. The recent focus on deep learning using advanced accelerators and diverse architectures, e.g., embedded devices, to speedup model training and inference means that increasing amounts of data security is needed to effectively tackle real-world problems like health analytics for vaccine candidate research and other critical health topics. The security of data processing on these devices is critical to preserve user privacy but it is increasingly challenging because of the diverse architecture designs that exist in modern testbeds. This BoF will investigate whether advanced architecture testbeds are ready to handle state-of-the-art deep learning techniques and data sets and will allow for open discussion between the panelists and audience.


URL: https://caatb.github.io/aatb-bofs/


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