SC21 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

Flexible GMRES with Analog Accelerators


Authors: Anshul Gupta, Vasileios Kalantzis, Mark S. Squillante, and Chai Wah Wu (IBM Research); Haim Avron (Tel Aviv University); and Shashanka Ubaru, Tayfun Gokmen, Malte Rasch, Tomasz Nowicki, and Lior Horesh (IBM Research)

Abstract: This research poster describes advances in the solution of general sparse linear systems by applying the preconditioning step primarily through the help of an analog crossbar array. These architectures can achieve high degrees of parallelism with low energy consumption by mapping matrices onto arrays of non-volatile memristive elements capable of storing information and executing basic arithmetic operations. Performing matrix-vector multiplication and outer-product updates is then possible in a time that is independent of the number of nonzero entries in the operand matrices. On the other hand, the analog crossbar arrays introduce large amounts of noise, and flexible algorithms are required. In this research nearly an order of magnitude speedup over GMRES preconditioned with ILU(0) is advanced, both with respect to similar solvers on a conventional microprocessor for attaining the same level of accuracy.

Best Poster Finalist (BP): no

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