SC21 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

Enabling Cache-Aware Roofline Analysis with Portable Hardware Counter Metrics


Workshop:PMBS21: The 12th International Workshop on Performance Modeling, Benchmarking and Simulation of High-Performance Computer Systems

Authors: Brian Gravelle (Los Alamos National Laboratory, University of Oregon); William D. Nystrom (Los Alamos National Laboratory); and Dewi Yokelson and Boyana Norris (University of Oregon)


Abstract: In this paper, we seek to provide guidance on how to empirically collect the information required to plot application points on Intel’s Cascade Lake Xeon processor and Fujitsu’s A64FX ARM-based processor. Understanding how to process this information is vital to use the Roofline for empirical performance analysis on these systems. This report is designed to enable users to collect data for these systems and lay the groundwork for us to create a portable method for empirical Roofline-based performance analysis. We do so by presenting our methods and several examples of them in use.





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