Benchmarking and Extending SYCL Hierarchical Parallelism
Event Type
Workshop
Online Only
Algorithms
Architectures
Extreme Scale Comptuing
Heterogeneous Systems
Memory Systems
Parallel Programming Languages and Models
Resource Management and Scheduling
W
TimeSunday, 14 November 202111am - 11:30am CST
LocationOnline
DescriptionSYCL is an open-standard, parallel programming model for programming heterogeneous devices from Khronos. It allows single-source programming of diverse attached devices in a cross-platform manner in modern C++. SYCL provides different layers of parallel abstractions, including Same Instruction Multiple Thread (SIMT) kernels, data-parallel loop concurrency and hierarchical parallelism. We discuss Scoped Parallelism as an extension to the existing Hierarchical Parallelism in SYCL, and highlight the advantages and disadvantages of these models from the perspective of the programmer and an implementer of SYCL. In this paper, we compare writing benchmark programs using SIMT kernel, hierarchical parallelism and scoped parallelism paradigms, and present results running on a high-performance CPU and GPU.
