Biography
Dr. Cesarini is an HPC Specialist at the HPC department of CINECA where his works is focused on the evaluation of next-generation HPC architectures to define the roadmap of CINECA’s computing infrastructures. He is a Steering Board member of ETP4HPC and he participates in several European research projects including the European Processor Initiative (EPI-SGA1) and the Resource Management for the Exascale Era (REGALE) where he leads the development roadmap of the energy efficient HPC tools.
He graduated in Computer Engineering from the University of Bologna (Italy) in 2014, where he also earned his Ph.D. in Electronics, Telecommunications, and Information Technologies Engineering in 2019. His range of expertise includes the development of SW-HW co-design strategies to support energy efficient HPC systems. He also leads the energy efficient HPC activities of CINECA where his work is focused to improve the power efficiency of the CINECA's data centers.
He graduated in Computer Engineering from the University of Bologna (Italy) in 2014, where he also earned his Ph.D. in Electronics, Telecommunications, and Information Technologies Engineering in 2019. His range of expertise includes the development of SW-HW co-design strategies to support energy efficient HPC systems. He also leads the energy efficient HPC activities of CINECA where his work is focused to improve the power efficiency of the CINECA's data centers.
Presentations
Birds of a Feather
Online Only
Green Computing
TP
XO / EX