Christopher Daley

Biography
Christopher Daley is a HPC Performance Engineer working in the Advanced Technology Group (ATG) at NERSC. He is the NERSC technical representative for the NERSC/NVIDIA OpenMP target offload Non-Recurring Engineering (NRE) contract. He is involved in understanding OpenMP target offload application requirements at NERSC and has contributed to the OpenMP target offload implementations in HPGMG, SU3, Batoid, XGC, BerkeleyGW, and GEM applications. His research interests include performance analysis of HPC applications and how portable programming methods, such as OpenMP, can be used to achieve high performance on current and next generation supercomputers. He has been with NERSC since 2013. Previously he was a scientific programmer at the Flash Center for Computational Science at the University of Chicago.
Presentations
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Paper

State of the Practice
TP
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Chair of Sessions
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W