Jeffrey Young
Biography
Dr. Young is a research scientist in the School of Computer Science at Georgia Tech and is part of GT’s post-Moore computing Center for Research into Novel Computing Hierarchies (CRNCH). In collaboration with other CRNCH faculty, Dr. Young has led the initial development of the “Rogues Gallery”, an NSF funded testbed focused on novel hardware that might be considered rogue by today’s standards but that may be critical for performance in future HPC systems. The Rogues Gallery currently hosts an Emu Chick prototype, in-network computing devices, novel FPGA and 3D stacked memory devices, power monitoring equipment, and the Field Programmable Analog Array, a low-power device that can be used to implement neuromorphic algorithms. In addition to CRNCH-related work, Dr. Young’s other research interests include the development of interconnects, accelerators, and memory abstractions to support high-performance applications and algorithms.
Presentations
Birds of a Feather
Online Only
Architectures
HPC Community Collaboration
TP
XO / EX
Workshop
Online Only
Accelerator-based Architectures
Parallel Programming Languages and Models
Performance
State of the Practice
W
Birds of a Feather
Online Only
Architectures
Security
System Software and Runtime Systems
TP
XO / EX
Chair of Sessions
Birds of a Feather
Online Only
Architectures
Security
System Software and Runtime Systems
TP
XO / EX