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Workshop: H2RC: Seventh International Workshop on Heterogeneous High-Performance Reconfigurable Computing

Session Chairs

Christian Plessl

Paderborn University, Germany

Torsten Hoefler

Kenneth O'Brien

University of South Carolina

Event TypeWorkshop

Tags

Registration Categories

TimeMonday, 15 November 20219am - 5:30pm CST

Location231-232

Presentations

9:00am - 9:01am CST	Seventh International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC) Organizers Kenneth O'Brien Jason Bakos Christian Plessl Torsten Hoefler Franck Cappello
9:01am - 9:05am CST	H2RC 2021: Opening Remarks Presenter Jason Bakos
9:05am - 10:00am CST	Hardware Specialization for Efficiency and Performance Presenter Derek Chiou
10:00am - 10:30am CST	H2RC: Morning Break (10-10:30)
10:30am - 11:00am CST	ACCL: FPGA-Accelerated Collectives over 100 Gbps TCP-IP Author/Presenters Zhenhao He Daniele Parravicini Lucian Petrica Kenneth O’Brien Gustavo Alonso Michaela Blott
11:00am - 11:30am CST	Near-Data FPGA-Accelerated Processing of Collective and Inference Operations in Disaggregated Memory Systems Author/Presenters Carsten Heinz Andreas Koch
11:30am - 12:00pm CST	Efficient HW and SW Interface Design for Convolutional Neural Networks Using High-Level Synthesis and TensorFlow Author/Presenters Ashish Mishra Volodymyr Kindratenko
12:00pm - 12:30pm CST	Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application Author/Presenters Marco Hartmann Lukas Weber Johannes Wirth Lukas Sommer Andreas Koch
12:30pm - 2:00pm CST	H2RC: Lunch Break (12:30-2)
2:00pm - 2:30pm CST	Optimized Implementation of the HPCG Benchmark on Reconfigurable Hardware Author/Presenter Alberto Zeni
2:30pm - 3:00pm CST	A Framework for Customizable FPGA-based Image Registration Accelerators Author/Presenter Davide Conficconi
3:00pm - 3:30pm CST	H2RC: Afternoon Break (3-3:30)
3:30pm - 3:45pm CST	The Open Cloud Testbed: A Resource for FPGA and Cloud Researchers Presenter Miriam Leeser
3:45pm - 4:15pm CST	Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components Author/Presenter Emanuele Del Sozzo
4:15pm - 4:30pm CST	Device_global: A SYCL Extension Introducing Device-Scoped Allocations to Enhance Performance and Usability Author/Presenters Michael Kinsner Artem Radzikhovskyy Joe Garvey
4:30pm - 5:00pm CST	Portable Compilation of NumPy to FPGAs Author/Presenters Johannes de Fine Licht Tiziano De Matteis Alexandros Nikolaos Ziogas Tal Ben-Nun Torsten Hoefler
5:00pm - 5:30pm CST	Porting In-Compressible Flow Matrix Assembly to FPGAs for Accelerating HPC Engineering Simulations Author/Presenter Nick Brown