Productive Parallel Programming for FPGA with High-Level Synthesis
Session Chair
Event TypeTutorial
In-Person Only
Accelerator-based Architectures
Parallel Programming Languages and Models
TUT
TimeSunday, 14 November 20218am - 12pm CST
Location264
Presentations
| 8:00am - 12:00pm CST | Productive Parallel Programming for FPGA with High-Level Synthesis |